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B












Opcodes
Approximate conventions in opcode names: Description conventions: Data values and pointers are sixteen-bit unless identified as 32-bit. When the potential for confusion exists, both 16- and 32bit quantities are noted. All sixteen-bit pointers are MDS relative.

The first operand byte is called alpha, and the second is called beta. In the case of subdivided bytes, the nibbles are called alpha.left and alpha.right (or beta-left and beta-right). If two operand bytes are considered as a sixteen-bit quantity, it is called alphabeta and is equal to alpha*256 + beta. Sign-extended operand bytes are sxalpha and sxbeta. The high and low bytes of sixteen-bit data are called data.high and data.low.

L is the address of the current local frame; G is the address of the current global frame; Cis the address of the current code segment. L and G are sixteen-bit MDS relative pointers.

In the unobvious cases, stack content at the beginning of the instruction will be given as "Stack has x, y, z." in bottom to top order. 32-bit quantities are stored in the stack with the least significant word on the bottom; in memory the least significant word is stored in the lower address.
 
 
Neumonic Instruction Description
LLn Load Local n (n = 0..11) Load from location L + n
LLB Load Local Byte Load from location L + alpha.
LLDn Load Local Double n (n = 0.8, 10) Load from locations L + n and L + n + 1.
LLDB Load Local Double Byte Load from locations L + alpha and L + alpha + 1.
SLn Store Local n (n = 0..10) Store into L + n.
SLB Store Local Byte Store into L + alpha.
SLDn Store Local Double n (n = 0..6,8) Store into L+ n+1 and L+n.
PLn Put Local n (n = 0..3)  Stack has data. Store data into L + n; leave data on stack.
PLB Put Local Byte Stack has data. Store data into L + alpha; leave data on stack.
PLDn Put Local Double n (n = 0)  Stack has 32-bit data. Store data into locations L i- n and L-i-n + 1; leave data on stack.
PLDB Put Local Double Byte Stack has 32-bit data. Store data into locations L-t-alpha and Li-alpha-i- 1; leave data on stack.
LGn Load Global n (n = 0..2)  Load from G i- n.
LGB Load Global Byte Load from G+ alpha.
LGDn Load Global Double n (n = 0,2) Load from locations G + n and G- I - n + 1~
LGDB Load Global Double Byte Load from locations G+alpha and Gi-alpha+ 1.
SGB Store Global Byte Store into G+ alpha. 
BNDCK Bounds Check Stack has value, limit. IF value "IN [O..limit) THEN trap ELSE discard limit.
BRK Breakpoint IF resuming from debugger THEN execute broken opcode ELSE trap.
Rn Read n (n = O..l) Stack has pointer. Load from pointer + n. 
RB Read Byte Stack has pointer. Load from pointer + alpha.
RLn Read Long n (n = 01  Stack has 32-bit pointer. Load from pointer + n.
RLB Read Long Byte Stack has 32-bit pointer. Load from pointer + alpha. 
RDn Read Double n (n = 01  Stack has pointer. Load from pointer + n and pointer + n + 1. 
RDB Read Double Byte Stack has pointer. Load from locations pointer + alpha and pointer + alpha + 1. 
RDLn Read Double Long n (n = 01  Stack has 32-bit pointer. Load from pointer + n and pointer + n + 1. 
RDLB Read Double Long Byte Stack has 32-bit pointer. Load from pointer + alpha and pointer + alpha + 1. 
Wfl Write n (n = 01  Stack has data, pointer. Store data into pointer + n. 
WB Write Byte Stack has data, pointer Store data into pointer + alpha. 
PSB Put Swapped Byte Stack has pointer, data Store data into pointer i- alpha; leave pointer on stack (but not data).
WLB Write Long Byte Stack has data, 32-bit pointer. Store data into pointer + alpha.
PSLB Put Swapped Long Byte  Stack has 32-bit pointer, data. Store data into pointer+alpha; leave pointer on stack (but not data).
WDB Write Double Byte Stack has 32-bit data, pointer. Store data into pointer+alpha and pointer + alpha + 1.
PSDn Put Swapped Double n (n = 0) Stack has pointer, 32-bit data. Store data into pointer + n and pointer-t n + 1;leave pointer on stack (but not data). 
PSDB Put Swapped Double Byte Stack has pointer, 32-bit data. Store data into pointer+alpha and pointer + alpha + 1; leave pointer on stack (but not data).
WDLB Write Double Long Byte Stack has 32-bit pointer, 32-bit data. Store data into pointer+alpha and pointer + alpha + 1. 
PSDLB Put Swapped Double Long Byte Stack has 32-bit pointer, 32-bit data. Store data into pointer +alpha and pointer + alpha+ 1; leave pointer on stack (but not data).
RLlOn Read Local Indirect Zero n (n = 0..3) Pointer is in L + 0. Load from pointer + n.
RLIP Read Local Indirect Pair Pointer is in L +alpha.left. Load from pointer + alpha.right.
RLILP Read Local Indirect Long Pair 32-bit pointer is in L+alpha.left and L+alpha.left+ 1. Load from pointer + alpha.right.
RLDlOn Read Local Double Indirect Zero n (n = 0)  32-bit pointer is in L + 0 and L + 1. Load from pointer + n and pointer - I - n + 1.
RLDIP Read Local Double Indirect Pair Pointer is in L + alpha.left. Load from pointer + alpha.right and L + alpha.right i- 1.
RLDILP Read Local Double Indirect Long Pair 32-bit pointer is in L i- alpha.left and L. + alphaleft + I. Load from pointer+ alpha.right and L + alpharight i- 1.
RGIP Read Global Indirect Pair Pointer is in G+ alpha-left. Load from pointer + alpharight. 
RGILP Read Global Indirect Long Pair 32-bit pointer is in G+alpha.left and G+alpha.lefti-I. Load from pointer + alpha.right.
WLIP Write Local Indirect Pair Pointer is in L + alphaleft. Store into pointer + alpha.right.
WLILP Write Local Indirect Long Pair 32-bit pointer is in L+alpha.left and L+alpha.left + 1. Store into pointer-t- alpha.right.
WLDILP WriteLocal Double Indirect Long Pair Stack has 32-bit data. 32-bit pointer is in L+ alpha.left and L + alpha.left + f.Store data into pointer + alpha right and pointer + alpha.right f 1
RS Read String Stack has pointer, index. Fetch word from pointer f (index/2); IF index MOD 2 = 0 THEN push word/256 ELSE push word MOD 256.
RLS Read Long String Stack has 32-bit pointer, index. Fetch word from pointer + (index/2); IF index MOD 2 = 0 THEN push word.high ELSE push wordlow.
WS Write String Stack has data, pointer, index. Fetch word from pointer + (index/a); IF index MOD 2 = 0 THEN word.high c data ELSE word.low +-= data; Store word at pointer + (index/2).
WLS Write Long String Stack has data, 32-bit pointer, index. Fetch word from pointer + (index/2); IF index MOD 2 = 0 THEN word-high c data ELSE wordlow +- data; Store word at pointer-i- (index/2).
ROF Read Zero Field Stack has pointer. Fetch word from pointer i- 0; push subword described by alpha.
RLOF Read Long Zero Field Stack has 32-bit pointer. Fetch word from pointer + 0; push subword described by alpha.
RF Read Field Stack has pointer. Fetch word from pointer+alpha; push subword described by beta.
RLF Read Long Field Stack has 32-bit pointer. Fetch word from pointer f alpha; push subword described by beta.
RLFS Read Long Field Stack Stack has 32-bit pointer, fieldDesc. Fetch word from pointer + fieldDesc.high; push subword described by fieldDesc.low.
RLIPF Read Local Indirect Pair Field Pointer is in L+alpha.left. Fetch word from pointer +alpha.right; push subword described by beta.
RLILPF Read Local Indirect Long Pair Field 32-bit pointer is in L+alpha.left. Fetch word from pointer f alpha.right; push subword described by beta.
WOF Write Zero Field = Stack has data, pointer. Fetch word from pointer + 0; put data in subword described by alpha; store word to pointer + 0.
WF Write Field = Stack has data, pointer. Fetch word from pointer+alpha; put data in subword described by beta; store word to pointer+ alpha.
PSF Put Swapped Field Stack has pointer, data. Fetch word from pointer+alpha; put data in subword described by beta; store word to pointer+ alpha; leave pointer on stack (but not data).
PSOF Put Swapped Zero Field = Stack has pointer, data. Fetch word from pointer + 0; put data in subword described by alpha; store word to pointer + 0; leave pointer on stack (but not data).
WSOF Write Swapped Zero Field Stack has pointer, data. Fetch word from pointer + 0; put data in subword described by alpha; store word to pointer + 0.
WLOF Write Long Zero Field Stack has data, 32-bit pointer. Fetch word from pointer+ 0; put data in subword described by alpha; store word to pointer + 0.
WLF Write Long Field Stack has data, 32-bit pointer. Fetch word from pointer-i-alpha; put data in subword described by beta; store word to pointer + alpha.
PSLF Put Swapped Long Field Stack has 32-bit pointer, data. Fetch word from pointer +alpha; put data in subword described by beta; store word to pointer + alpha; leave pointer on stack (but not data).
WLFS Write Long Field Stack Stack has data, 32-bit pointer, fieldDesc. Fetch word from pointer + fieldDesc.high; put data in subword described by fieldDesc.low; store word to pointer + alpha.
SLDB Store Local Double Byte Store into L + alpha.
SGDB Store Global Byte Store into G + alpha.
LLKB Load Link Byte Fetch from G-2 and test link location bit. 0 = > Load from G-6-(2*alpha) and G-6-(2*alpha) + 1 1 = > Load from C-2-(2*alpha) and C-2-(2*alpha) + 1.
RKIB Read Link Indirect Byte Fetch 32-bit pointer as described in LLKB; load from pointer + 0.
RKDIB Read Link Double Indirect Byte Fetch 32-bit pointer as described in LLKB; load from pointer + 0 and pointer + 1.
LKB  Link Byte Recover word from above the top of stack; store word-alpha in L + 0.
SHIFT Shift Stack has data, count. Shift data by count bits; left if count is positive; right if count is negative.
SHIFTS0 Shift Signed Byte Stack has data. Shift data by sign-extended alpha; left if positive; right if negative.
CATCH Catch Two byte noop used by Mesa runtime system.
Jn Jump n (n = 2..8)  Unconditional jump. New PC is PC + n.
JB Jump Byte Unconditional jump. New PC is PC + sxalpha.
JW Jump Word Unconditional jump. New PC is PC + alphabeta.
JEP Jump Equal Pair Stack has data. IF data = alpha.left THEN new PC is PC + alpha-right 9 2.
JEB Jump Equal Byte Stack has datal, data2. IF data1 = data2 THEN new PC is PC + sxalpha.
JEBB Jump Equal Byte Byte Stack has data. IF data = alpha THEN new PC is PC + sxbeta.
JNEP Jump Not Equal Pair  Stack has data. IF data # alpha.left THEN new PC is PC +alpha.right -t- 2.
JNEB Jump Not Equal Byte Stack has datal, data2. IF data1 # data2 THEN new PC is PC + sxalpha.
JNEBB Jump Not Equal Byte Byte Stack has data. IF data # alpha THEN new PC is PC + sxbeta. 
JLB Jump Less Byte Stack has datal, data2. IF data1 < data2 (signed) THEN new PC is PC -I- sxalpha.
JGEB Jump Greater Equal Byte Stack has datal, data2. IF data1 > = data2 (signed) THEN new PC is PC + sxalpha.
JGB Jump Greater Byte Stack has datal, data2. IF data1 > data2 (signed) THEN new PC is PC i- sxalpha.
JLEB Jump Less Equal Byte Stack has datal, data2. IF data1 < = data2 (signed) THEN new PC is PC + sxalpha.
JULB Jump Unsigned Less Byte  Stack has dataf, data2. IF data1 < data2 (unsigned) THEN new PC is PC + sxalpha.
JUGEB Jump Unsigned Greater Equal Byte Stack has datal, data2. IF data1 > = data2 (unsigned) THEN new PC is PC + sxalpha.
JUGB Jump Unsigned Greater Byte Stack has datal, data2. IF data1 > data2 (unsigned) THEN new PC is PC + sxalpha.
JULEB Jump Unsigned Less Equal Byte Stack has datal, data2 IF data1 < = data2 (unsigned) THEN new PC is PC + sxalpha.
JZn Jump Zero n (n = 3..4)  Stack has data. IF data = 0 THEN new PC is PC + n.
JZB Jump Zero Byte Stack has data. IF data = 0 THEN new PC is PC + sxalpha.
JNZn Jump Not Zero n (n = 3..4) Stack has data. IF data # 0 THEN new PC is PC + n.
JNZB Jump Not Zero Byte Stack has data. IF data # 0 THEN new PC is PC + sxalpha.
JDEB Jump Double Equal Stack has 32-bit datal, 32-bit data2. IF data1 = data2 THEN new PC is PC + sxalpha.
JDNEB Jump Double Not Equal Stack has 32-bit datal, 32-bit data2. IF data1 # data2 THEN new PC is PC + sxalpha.
JIB Jump Indexed Byte Stack has index, limit. IF index < limit THEN { fetch disp from C+alphabeta+(index./d); new PC is PC + IF index MOD 2 = 0 THEN disp.high ELSE disp.low}.
JIW Jump Indexed Word Stack has index, limit. IF index < limit THEN { fetch disp from C + alphabeta + index; new PC is PC + disp}.
REC  Recover Recover the value above the top of stack, i.e. increment the stack pointer without changing any stack values.
REC2 Recover 2  Recover the two values above the top of stack, i.e. increment the stack pointer by two without changing any stack values.
DIS Discard Discard the top value on the stack, i.e. decrement the stack pointer
DIS2 Discard 2 Discard the top two values on the stack, i.e. decrement the stack pointer by two.
EXCH Exchange  Interchange the top two values on the stack.
DEXCH Double Exchange Interchange the top two 32-bit values on the stack.
DUP Duplicate Duplicate the top value on the stack.
DDUP Double Duplicate Duplicate the top 32-bit value on the stack.
EXDIS Exchange Discard  Equivalent to the sequence EXCH; DIS.
NEG Negate Stack has data. Push O-data.
INC Increment Stack has data. Push data + 1.
DEC Decrement  Stack has data. Push data-l.
DING Double Increment Stack has 32-bit data. Push data + 1
DBL Double  Stack has data. Push data*2.
DDBL Double Double  Stack has 32-bit data. Push data*2.
TRPL Triple Stack has data. Push data*3.
AND And Stack has datal, data2. Push data1 AND data2.
IOR Inclusive Or Stack has datal, data2. Push data1 OR data2.
ADDSB Add Signed Byte Stack has data. Push data + sxalpha.
ADD Add Stack has datal, datad. Push data1 + data2.
SUB Subtract Stack has datal, data2. Push datal-data2
DADD Double Add Stack has 32-bit datal, 32-bit data2. Push data1 + data2.
DSUB Double Subtract Stack has 32-bit datal, 32-bit data2. Push datal-data2.
ADC Add Double to Cardinal Stack has 32-bit datal, 16-bit data2. Push data1 +data2.
ACD Add Cardinal to Double Stack has 16-bit datal, 32-bit data2. Push data1 +data2.
ALOIB Add Local Zero Immediate Byte Fetch data from L + 0; Push data+ alpha.
MUL Multiply Stack has datal, data2. Push the 32-bit value datal*data2 then decrement the stack pointer. The effect is to leave the Is-bit product on the stack and the high 16 bits of the product above the stack.
DCMP Double Compare Stack has 32-bit datal, 32-bit data2. Compare data1 and data2 (signed) and push -1 if data1 < data2; 0 if data1 = data2; + 1 if data1 > data2
UDCMP Unsigned Double Compare Stack has 32-bit datal, 32-bit data2. Compare data1 and data2 (unsigned) and push -1 if data1 <data2; 0 ifdatal =data2; + 1 if data1 >data2.
Lln Load Immediate n (n = O..lO) Push n.
LlN1 Load Immediate Negative 1 Push -1.
LINI Load Immediate Negative Infinity Push -32768.
LIB Load Immediate Byte Push alpha.
LIW Load Immediate Word Push alphabeta.
LINB Load Immediate Negative Byte Push alpha-256. (I.e. set the high byte to all ones).
LIHB Load Immediate High Byte Push aIpha*256.
LID0 Load Immediate Double 0 Push two words of zero.
LAn Local Address n (n = 0..3,6,8) Push Is-bit value L + n (not the contents of).
LAB Local Address Byte Push 16-bit value L i-alpha.
LAW Local Address Word  Push 16-bit value L + alphabeta
GAn Global Address n (n = O..l) Push 16-bit value G+ n.
GAB Global Address Byte Push 16-bit value G+ alpha.
GAW Global Address Word Push 16-bit value G+ alphabeta.
EFCn External Function Call n (n = 0..12) Fetch link n as described in LLKB and XFER to it.
EFCB External Function Call Byte Fetch link alpha as described in LLKB and XFER to it.
LFC Local Function Call Do the last half of XFER (frame allocation and set new PC) using alphabeta as the PC of the new procedure.
SFC Stack Function Call  Stack has 32-bit controllink. XFER to controllink.
RET Return Fetch returnLink from L-l; XFER to returnLink with a source of zero.
KFCB Kernel Function Call Byte Fetch link from SD[alpha] and XFER to it.
ME Monitor Enter Stack has 32-bit pointer to monitor lock. IF the monitor is unlocked THEN lock it ELSE enqueue current process onmonitor queue and reschedule.
MX Monitor Exit  Stack has 32-bit pointer to monitor lock. Unlock the monitor; IF the queue is not empty, wake up the first waiting process and reschedule.
BLT Block Transfer Stack has SourcePointer, count, destpointer. Transfer count words beginning at SourcePointer to locations beginning at destpointer. This instruction is interruptable; if interrupted it leaves updated values on the stack and the isntruction is restarted after the interrupt with this new data.
BLTL  Block Transfer Long Stack has 32-bit SourcePointer, 18bit count, 32-bit destpointer. See BLT for remainder of description.
BLTC Block Transfer Code Stack has 16-bit offset, count, destpointer. SourcePointer is C +-offset; see BLT.
BLTCL Block Transfer Code Long Stack has 16-bit offset, count, 32-bit destpointer. SourcePointer is C + offset; see BLT. 
LP Lengthen Pointer Stack has pointer. IF pointer = 0 THEN push 0 ELSE push MDS.
ESC Escape Use alpha for a secondary opcode dispatch (see below). This instruction is always exactly two bytes long. Unimplemented instructions trap through the ESCTrapTable.
ESCL Escape Long Like ESC except this instruction is always exactly three bytes long.
RESRVD Reserved Opcodes 0 and 255 are reserved for implementation dependent uses, e.g. one implementation implemented interrupts by forcing the next opcode dispatch to go to opcode 0 and sorting out the state there. These codes are never generated by the compiler and should not be assigned any programmer accessible function.

Escape opcode alpha bytes: There are two Escape opcodes, ESC and ESCL. These decode their alpha bytes from a single eight-bit address space. The sole purpose of having two different instructions is so that all Mesa opcodes have one fixed length. This permits (relatively) simple hardware to pre-fetch and pre-decode instructions based only on their first byte. In the list below, codes beginning with "a" are used exclusively with ESC to form a two-byte opcode. Codes beginning with "b" are used exclusively with ESCL (and the following beta byte) to form a three-byte opcode.
 
 
Neumonic Instruction Description
aMW Monitor Wait Stack has 32-bit monitorPointer, 32-bit ConditionPointer, 16-bit timeout. Unlock monitor (and wakeup waiting process if any); enqueue current process on condition with timeout value; reschedule. Exceptions: IF condition has wakeup waiting OR process has been aborted THEN current process continues to run. aMR Monitor Reenter Stack has 32-bit monitorpointer, 32-bit conditionpointer. IF monitor locked THEN enqueue on monitor queue and reschedule ELSE {test for aborting and trap if appropriate; lock monitor and proceed}.
aNC Notify Condition  Stack has 32-bit conditionpointer. Wakeup the first process on the condition queue and reschedule if awakened.
aBC Broadcast Condition Wakeup all process on the condition queue and reschedule if any awakened.
aREQ Requeue  Stack has 32-bit queuepointerl, 32-bit queuePointer2, 16-bit process Dequeue process from queue1 and enqueue it on queue2. IF either queue was the ready list THEN reschedule.
aSM Set Map Stack has 32-bit virtualpage, 32-bit realPage, flags. Set up the indicated virtual to real mapping.
aSMF Set Map Flags Stack has 32-bit virtualpage, flags Set the flags in the indicated map entry.
aGMF Get Map Flags Stack has 32-bit virtualpage. Push the flags of the indicated virtual page.
aAF Allocate Frame Stack has index. Allocate a frame from the indicated list (as in a procedure call) and push the Is-bit address of the frame.
aFF Free Frame Stack has pointer. Fetch index from pointer-3 and link the frame onto the indicated list.
aPI Port In Recover source and portAddress from above stack. Store 32-bit zero at portAddress + 0; IF source # 0 THEN extend it with a high order zero and store at portAddress + 2 and portAddress + 3.
aP0 Port out Stack has portAddress. Store L at portAddress + 0; fetch link from portAddress +- 2 and portAdress + 3 and XFER to it with a source of portAddress.
aPOR Port Out Responding Identical to Port Out. The distinction between the two is used by a trap handler to decide how to recover from port faults.
aSPP Set Process Priority Stack has priority. Dequeue current process from ready queue; change its priority; 1 enqueue process on ready queue and reschedule.
aDI  Disable Interrupts Increment the WakeupDisableCounter thus disabling any interrupt processing and process timeouts. Trap if the counter overflows.
aEi Enable Interrupts  Decrement the WakeupDisableCounter; if the new value is zero, interrupts are now enabled. Trap if the counter under-flows.
aXOR Exclusive Or Stack has datal, data2. Push data1 XOR data2.
aDAND Double And Stack has 32-bit datal, 32-bit data2. Push data1 AND data2.
aDlOR Double Inclusive Or Stack has 32-bit datal, 32-bit data2. Push data1 OR data2.
aDXOR Double Exclusive Or Stack has 32-bit datal, 32-bit data2. Push data1 XOR data2.
aROTATE Rotate Stack has data, count. Rotate data by count MOD 16 bits; left if count is positive; right ifcount is negative.
aDSHIFT Double Shift Stack has 32-bit data, count. Shift data by count bits; left if count is positive; right if count is negative.
aLINT Lengthen Integer Stack has data. Sign extend data from 16 to 32 bits.
aJS Jump Stack Stack has newpc. Unconditional jump to newpc (relative to C all pc values are).
aRCFS Read Code Field Stack Stack has offset, BeldDesc. Fetch word from C + offset + fieldDesc. high; push subword described by freldDesc.low.
bRC Read Code Stack has offset. Load from C + offset.
aUDlV Unsigned Divide Stack has datal, data2. Push quotient and remainder from datalIdata2; decrement the stack pointer so as to leave the remainder above the stack.
aLUDlV Long Unsigned Divide (should be Double, not Long) Stack has 32-bit datal, 16- bit data2. Push quotient and remainder from datal/data2; decrement the stack pointer so as to leave the remainder above the stack. Trap if the quotient will not fit in 16 bits.
bROB Read Overhead Byte Stack has pointer. Load from pointer-beta. All access to local and global frame overhead is done through this instruction (and aWOB) so that the processor could cache this data.
bWOB Write Overhead Byte Stack has data, pointer. Store data at pointer-beta. All access to local and global frame overhead is done through this instruction (and aROB) so that the processor could cache this data.
bDSK Dump Stack Dump the evaluation stack and stack pointer starting at L+ beta. No more than two values above the top of stack need be stored.
bXE Xfer and Enable XFER using destination stored at L + beta and L+ beta+ 1 and source stored at L+beta+2 and L+ beta+ 3; at the end of the XFER, decrement the WakeupDisableCounter. bXF Xfer and Free XFER using destination stored at L + beta and L + beta + 1 and source stored at L + beta + 2 and L + beta + 3; at the end of the XFER, free the current local frame.
bLSK Load Stack Load the evaluation stack and stack pointer from locations starting at L + beta. No more than two values above the top of stack need be loaded.
aBNDCKL BoundsCheck Long Stack has 32-bit value, 32-bit limit IF value -IN [O..limit) THEN trap ELSE discard limit.
aNlLCK NIL Check Stack has pointer. IF pointer = 0 THEN trap ELSE leave pointer on stack.
aNILCKL NIL Check Long Stack has 32-bit pointer. IF pointer = 0 THEN trap ELSE leave pointer on stack.
aBLTLR Block Transfer Long Reverse Stack has 32-bit sourcePointer, Is-bit count, 32-bit destpointer. Working backwards through memory, transfer count words beginning at sourcePointer + count-l to locations beginning at destpointer + count-l. This instruction is interruptable; if interrupted it leaves updated values on the stack and the isntruction is restarted after the interrupt with this new data.
aBLEL Block Equal Long Stack has 32-bit pointerl, 16-bit count, 32-bit pointer2. Compare count words beginning at pointer1 and pointer2; push 1 if all words are equal; 0 otherwise. This instruction is interruptable like BLT.
aBLECL  Block Equal Code Long Stack has 16-bit offset, Is-bit count, 32-bit pointer2. Like BLEL with pointer1 = C + offset.
aCKSUM Checksum Computes the XNS protocol checksum of a block of words. Interruptable.
aBlTBLT Bit Block Transfer  Stack has pointer to parameters record. Performs many operations on rectangular areas in memory. Used mostly in conjunction with bitmap display data. Known in some quarters as RasterOp.
aTXTBLT Test Block Transfer Stack has pointer to parameters record. Specialized code for measuring and displaying textual data in bitmapped display memory.
aBYTBLT Byte Block Transfer  Stack has 32-bit destpointer, destlndex, count, 32bit sourcepointer, sourceIndex. Like BLT except operates on byte sequences with potentially different alignments
aBYTBLTR Byte Block Transfer Reverse Stack has 32-bit destpointer, destIndex, count, 32-bit sourcepointer, sourceIndex. Like BYTBLT except operates on byte sequences from high to low addresses.
aVERSION Version Returns processor dependent data about the type of processor and the version of microcode.
aDMUL Double Multiply Stack has 32-bit datal, 32-bit data2. Push 32-bit product dataf*data2; overflow is ignored.
aSDlV Signed Divide Stack has 32-bit datal, 32-bit data2. Push quotient and remainder from datalJdata2; decrement the stack pointer so as to leave the remainder above the stack.
aSDDlV Signed Double Divide Stack has 32-bit datal, 32-bit data2. Push quotient and remainder from datalldata2; decrement the stack pointer by 2 so as to leave the remainder above the stack.
aUDDlV Unsignedigned Double Divide  Stack has 32-bit datal, 32-bit data2. Push quotient and remainder from datalldata2; decrement the stack pointer by 2 so as to leave the remainder above the stack. -- Floating Point (IEEE standard format, 32-bit only)
aFADD Floating Add
aFSUB Floating Subtract
aFMUL Floating Multiply 
aFDlV  Floating Divide
aFCOMP Floating Compare Returns -l,O, + 1 like DCMP.
aFlX Fix Returns 32-bit integer
aFLOAT Float Takes 32-bit integer.
aFIXl Fix to Integer Returns Is-bit integer.
aFIXC Fix to Cardinal Returns 16-bit unsigned number.
aFSTlCKY Floating Sticky Flags Sets floating point sticky flags, returns old value.
aFREM Floating Remainder Returns the fractional part of a quotient.
aROUND Round Rounds operand to 32-bit integer.
aROUNDI Round to Integer  Rounds to Is-bit integer.
aROUNDC Round to cardinal Rounds to 16-bit unsigned number.
aFSQRT Floating Square Root
aFSC Floating Scale

 Read / Write Registers
 
 
aWRPSB Write Register PSB Set the id of the current process.
aWRMDS Write Register MDS Set the current value of MDS.
aWRWP Write Register Wakeups Pending Bit mask of interrupts not yet processed.
aWRWDC Write Register Wakeup Disable Counter Controls the taking of interrupts.
aWRPTC Write Register Process Tick Counter The counter which controls process timeouts.
aWRIT Write Register Interval Timer The high resolution (l-100 microseconds).
aWRXTS Write Register Xfer Trap Status Governs the taking of a trap on evry XFER.
aWRMP Write Register Maintenance Panel Four digit decimal LED display.
aRRPSB
aRRMDS
aRRWP
aRRWDC
aRRPTC
aRRPTC
aRRPTC
aRRlT
aRRXTS

Processor Dependent Instructions
 
 
aINPUT I/O Input Stack has Is-bit I/O register number. Returns Is-bit data. aOUTPUT I/O output Stack has 16-bit I/O register number, 16-bit data.
aLOADRAMJ Load Control Store and Jump  Overwrite your own control store and execute the new code.

Dandelion Instructions
 
 
aBANDBLT Band Block Transfer Specialized code for printers

Cedar collector and allocator
 
 
aRECLAIMREF
aALTERCOUNT
aRESETSTKBITS
aGCSETUP
al44
aENUMERATERECLAlMABLE
al46
aCREATEREF 
a150
aREFTYPE
aCANONlCALREFTYPE
aALLOCQUANTlZED
aALLOCHEAP
aFREEOBJECT
aFREEQUANTlZED
aFREEPREFlXED
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[last edited 11 March 1999]